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Altera_Forum's avatar
Altera_Forum
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12 years ago

Triple Speed Ethernet and transceiver blocks

We have a Nios2/s processor running a triple speed ethernet (TSE) with a scatter gather DMA. Working off the of the triple speed ethernet example from altera for our board (DE4 Stratix IV board), the...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

I think transceivers are used when connecting to a PHY though a SGMII interface. This is only possible with FPGA's that actually have transceivers, so the option is greyed out for the other FPGA families.