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Honored Contributor
Honored ContributorTransferring data from a HDL to the Nios II processor
Hello, I have a HDL module which is connected to the Avalon bus as a slave component. The component has a FIFO with a length of 4096 * 32 bits values which the processor should read out perdiod...
Altera_ForumHonored Contributor
Honored ContributorIt really depends on your case.
Ie, if I assume that your component always holds all the status and measurement data, then it may be simpler to simply expose that in the MM slave interface as separate addresses. This would avoid the need to copy the selected data into the FIFO. It also depends on your performance needs. In an extreme case, you may want your component to be have a MM master interface and write data directly into RAM.
