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Altera_Forum
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14 years ago

Transferring data from a HDL to the Nios II processor

Hello, I have a HDL module which is connected to the Avalon bus as a slave component. The component has a FIFO with a length of 4096 * 32 bits values which the processor should read out perdiod...
Altera_Forum's avatar
Altera_Forum
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14 years ago

Avalon-ST is not a bus, it's a simple FIFO like interface for streaming data.

And SGDMA also supports Avalon-ST sources/sinks.