Forum Discussion
Altera_Forum
Honored Contributor
16 years agoThank You very much, to be sure would the following code act correctly?
avs_we_writedata: in std_logic_vector(0 downto 63); --the input
(...)
--then i declare two internal signals
signal register_1: std_logic_vector(0 downto 31);
signal register_2: std_logic_vector(0 downto 31);
--and then in process
if avs_we_byteenable = "00001111" then
register_1 <= avs_we_writedata(31 downto 0);
register_2 <=register_2;
elsif avs_we_byteenable = "11110000" then
register_1 <=register_1;
register_2 <= avs_we_writedata(63 downto 32);
else
register_1 <= register_1;
register_2 <= register_2;
end if;
and in software should i use IOWR(COMPONENT_IN_BASE, 0, vector_64bit); or IOWR(COMPONENT_IN_BASE, 0x0, vector_1_32bit);
IOWR(COMPONENT_IN_BASE, 0x4, vector_2_32bit); ? I am a little bit confused Thanks in advance