Honored ContributorI want to control a CMOS camera(30fps,640*480,data width 8bit) by FPGA, and the device is Cyclone c6(48MHZ). So I'm wondering if the FPGA can directly read the data form camera without any buffer device.
If a buffer is needed, what kind of hardware should be implemeted here? A sram ? Or a fifo?And what the data flow should be like? Thand you!!
Honored ContributorYour question about buffering depends solely on your application. What are you going to do with your image?
If you are going to do some direct processing on the image, you might get away with a pretty small buffer. If you need to store a couple of seconds of image data, you will need a pretty big buffer. HavardHonored ContributorYou can use a fifo or dpram to buffer your image data, I recommend you use two buffers in a ping-pang structure.
If u use logic design in your FPGA to process the image data, you may not need the buffer(s), but if you use Nios to control the dataflow, the buffer is necessary. By the way, if you want to store image(s) in RAM, you can use SDRAM instead of sram, cause the former is cheaper than the latter, of course this is due to how many images you want to store in your RAM.
