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Altera_Forum
Honored Contributor
15 years agoThank you for your answer dong
--- Quote Start --- Once upon a time, on another processor (far, far away) I changed the behavior of the OS_ENTER/EXIT_CRITICAL to not disable all interrupts, but masked all except my own high priority timer interrupt. --- Quote End --- In this case I understand I simply need to modify the OS_ENTER/EXIT_CRITICAL macros, isn't it? I'm not that expert on interrupt configuration on Nios II. Can you tell me how did you selectively disable interrupts? ... or am I asking something too far far away? --- Quote Start --- Another option would be to just read a free-running counter in the interrupt. Even though the interrupt is not time consistent, the free-running counter would let you know what time it is, or you could then stall in the ISR till a time reachable by all possible jitters finally arrives. --- Quote End --- Infact I considered this option, but it would imply the processor must stall for a while waiting for the required time. This would be not very efficient. Thanks Cris