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Altera_Forum's avatar
Altera_Forum
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19 years ago

tightly coupled peripherals?

I'd like to create a tightly coupled memory interface to a peripheral (specifically, I want a dual port, dual clock ram block with one of the ports connected to a TCM interface on a NiosII processor). Anything I've created in component builder won't connect to a TCM interface. The only way I've found to do is is to create a SOPC system with a dummy dual port ram block and some dummy exported ports and then edit the HDL file manually to connect the two. Is there a better way? I really, really need the I/O performance of a TCM port to make this work. Timing tests involving a normal memory interface failed because of long stwio write delays.

Thanks,

Tim

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    Make sure your component is dynamic (memory), write latency of 0, read latency of 1, 32 bits wide (4 byte enables). I haven't tried this but that's essentially what you are hooking up to Nios when you use a tightly coupled memory. Don't forget that you can't connect anything else to the memory port since tightly coupled master connections can't be shared.