tightly-coupled memory performance !!

I'd guess at the dynamic branch predictor changing the latency of some branches.

There is a hidden (on sopc at least) menu with some extra nios cpu options. One of which is to remove the dynamic branch prediction logic and just use the static prediction 'assume backwards taken' and 'forwards not taken'.

Actually a shame there isn't the option 'assume all not taken'.

I needed to minimise the worst case path so had to persuade gcc to generate forward branches to backwards jumps in quite a few places (add an asm volatile () that only contains comments).