the problem about multi-core CPU

hi,Paolo

thank you for your help. I have looked at the paper you said, but i think you maybe misunderstand my meaning. In the paper you said, the ERIKA Enterprise utilized the MUTEX in their design, which is no problem. however, if the ERIKA Enterprise utilized the MAILBOX in their design, i think which mayber have some problem.

since :

1 mutex can only allow one CPU to operate the shared memory (including read and write),but, only one CPU can read or write the shared memory at the same time by binary semaphores. it is no problem to the shared memory.

mailbox is basically equal to two mutex. one mutex can only allow one CPU to read the shared memory, and the other mutex can only allow one CPU to write the shared memory. In fact, mailbox is equal to allow two CPU to operate the shared memory at the same time. therefore, the operation confusion maybe appear to same address at the same time.

for example : the digital collecting and analysing instrument have two task, one task which use one CPU to do collecting work will write data from A/D tranlator to shared memory whose address is 0xc0000000, the other task which use the other CPU to do analysing work will read data from the address is 0xc0000000 to the CPU. if two tasks will run at the same time, the operation confusion problem will turn forth about the 0xc0000000 address. therefor, i think mailbox maybe have some problem to protect the address. probably, we can use some software to solve the problem by mutual

excluding mechanism .

2 seem, there have some problem in the software about startup barrier when resets the multi-core CPU.