Altera_Forum
Honored Contributor
15 years agoTCP/IP via TSE and Marvell PHY
Hello,
I have the Nios II dev board Stratix II edition. In addition, we have the MoreThanIP Marvell 10/100/1000 Ethernet daughter card that can be stuck on the dev board. I'm looking for documentation and/or reference designs for implementing the complete TPC/IP stack with this setup. The software side probably is the simplest, because Altera provide Nios II drivers for the TSE. However, how to build the system in SOPC and connect TSE to the PHY? The Altera reference design for ethernet uses a GX board with direct connection from the FPGA to the SFPs, and MoreThanIP's ref designs include *their* MAC and not Altera's TSE. Both aren't what I'm looking for. Thanks in advance