TCM speed advantage over onchip RAM?

Except that there is little point using the cache when accessing M9K memory blocks. Use the 'dual ports' on the memory so that other avalon masters can access it.

You probably also want to ensure the linker places all readonly data into the data memory (not the code memory) since you don't want to be doing avalon transfers (with or without the data cache) for strings and switch statement jump tables. This probably requires a custom linker script - for a small system start from an emtpy file and add sections as you need them!