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Altera_Forum
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12 years ago

Standard Ethernet example cpu generation issue

Hi,

I am trying to regenerate the standard ethernet design useing quartus webpack 12.0 sp2 and I get the following errors when I generate the niosii-ethernet-standard-3c25/eth_std_main_system in Qsys. What am I doing wrong?

Error: cpu: Failed to generate module eth_std_main_system_cpu

Info: cpu: Done RTL generation for module 'eth_std_main_system_cpu'

Info: cpu: "eth_std_main_system" instantiated altera_nios2_qsys "cpu"

Error: Generation stopped, 74 or more modules remaining

Info: eth_std_main_system: Done eth_std_main_system" with 36 modules, 16 files, 949361 bytes

Error: ip-generate failed with exit code 1: 2 Errors, 7 Warnings

Info: Finished: Create HDL design files for synthesis

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    Hi,

    I am trying to regenerate the standard ethernet design useing quartus webpack 12.0 sp2 and I get the following errors when I generate the niosii-ethernet-standard-3c25/eth_std_main_system in Qsys. What am I doing wrong?

    Error: cpu: Failed to generate module eth_std_main_system_cpu

    Info: cpu: Done RTL generation for module 'eth_std_main_system_cpu'

    Info: cpu: "eth_std_main_system" instantiated altera_nios2_qsys "cpu"

    Error: Generation stopped, 74 or more modules remaining

    Info: eth_std_main_system: Done eth_std_main_system" with 36 modules, 16 files, 949361 bytes

    Error: ip-generate failed with exit code 1: 2 Errors, 7 Warnings

    Info: Finished: Create HDL design files for synthesis

    --- Quote End ---

    Found that generate doesn't work when using Quartus as an operating system