SRAM interface timing parameters

Here's what I got from one of the developers. Please tell me if it helps you solve your problem...

The default dev kit SRAM component (two IDT71V416 chips, normally appearing as 'ext_ram' in example designs) should automatically compensate for timing by adding appropriate Avalon wait states depending on the desired System Clock Frequency.

Internal memories do not compensate in the same way; other external memories require their own class.ptf files to configure their timing requirements.

You cannot modify the timing settings of the default component -- it does all the math for you, based on System Clock and it's class.ptf settings.

There are 3 sets of settings (wait states & setup/hold times), for the following frequency ranges:

{f <= 50MHz}

{50MHz < f <= 100MHz}

{f > 100MHz}

To get different setting requires making your own component/class.ptf, or hand editing the system.ptf.