splitting code between 2 SRAM

Hi. I ahve a nios1 system running out of external SRAM , the problem arises when i try to do sensitive analog mesument and howskieeping tasks on the NIOS accesing external SRAM generate noise. I would like to add extra SRAM inside FPGA , i have around 4K avalable and split the code and data between 2 rams.

I would like to run during the mesument from the internal ram and totaly stop external buss from tuggling.

What is the best way to do that?

Is the custom liker script the way to go?

How should i modify the linker script to achive it?

Thanks Sergey