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That's normally what I do first. I go to NIOS system console do the following
...
This works 100% all the time returning the sysid and the timestamp without the custom DDR Controller. But as soon as I enable use of the DDR controller, the console hangs at the command
processor_stop $mm
and gives the error Target is Broken and needs to be reset. Also, I am using onchip ram for my processor instruction, data, reset and exception vectors. I have attached the following images as added information:
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If the processor_stop command hangs then this probably means that the processor is unable to go into debug mode. The most likely reason for this is that the processor is unable to complete the current instruction, for example because the code at the reset address was trying to read from the DDR controller.
You might want to try using processor_reset instead of processor_stop - that will reset the processor before putting it into debug mode, a solution which should work.
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