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Altera_Forum's avatar
Altera_Forum
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21 years ago

SOPC Builder

ciao to everybody I'm trying to build a new system with cpu nios 2 , sdram ,tristate bridge and my user component I import my component vhdl file and i declare 2 port that in slave are ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

SOPC builder generate MySystem and all files .

The file i think most importat is the "class.ptf" that describe my system

including my component .

Here i can see my declarations , like as i wrote up , in the preview post .

PORT_WIRING

{

PORT clk

{

width = "1";

direction = "input";

type = "clk";

}

PORT i1

{

width = "1";

direction = "input";

type = "reset";

}

PORT i2

{

width = "1";

direction = "input";

type = "write";

}

PORT i3

{

width = "32";

direction = "input";

type = "writedata";

}

PORT i4

{

width = "32";

direction = "input";

type = "writedata";

}

PORT i5

{

width = "32";

direction = "input";

type = "writedata";

}

PORT i6

{

width = "32";

direction = "input";

type = "address";

}

PORT o1

{

width = "1";

direction = "output";

type = "export";

}

PORT o2

{

width = "1";

direction = "export";

type = "";

}

}

}

SIMULATION

{

DISPLAY

{

SIGNAL a

{

name = "clk";

}

SIGNAL b

{

name = "i1";

}

SIGNAL c

{

name = "i2";

}

SIGNAL d

{

name = "i3";

radix = "hexadecimal";

}

SIGNAL e

{

name = "i4";

radix = "hexadecimal";

}

SIGNAL f

{

name = "i5";

radix = "hexadecimal";

}

SIGNAL g

{

name = "i6";

radix = "hexadecimal";

}

SIGNAL h

{

name = "o1";

}

SIGNAL i

{

name = "o2";

}

}

}

}

Ok now the system knows my component.

How may i write the low-level library to enter and interface it with

Nios II IDE ?

Don't fight me , be patient

It's only ten days i'm starting with altera fpga and this world

thanks

walter