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The EPCS needs to be, at least, be big enough to hold the FPGA configuration and the NIOS system image.
The FPGA configuration's size is fixed for a FPGA model, unless you use compression. In this case, it will vary with your design.
The size of the NIOS image will depend on what you put in it.
Regarding program memory, it's your SOPC, you should know what's being used.
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Thank you rbugalho.
But that is why I want to know, first I've a .flash file for my FPGA design, then I've two .flash files more (I commented it above).
The point is, for that FPGA configuration, and for that files generated by the "flash programmer", should I choose a EPCS device with enough bytes which that .flash files sum ?
Remember, I've all that code running on a DE2 board, but this board have a EPCS64, too big and too expensive, if my project fits in a EPCS16 or less, I could save a lot of money for my design, (and this is my fisrt one using an FPGA)
I'm self study guy, believe me, I'm able to do all this working fine, but I'm still not able to know... which is the size of my project to fit in the EPCS, all I've is the files that the flash programmer has generated. Maybe the question is trivial for you, but not for me.
Thanks again !
Alberto.
Honored Contributor
