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Altera_Forum
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14 years ago

simultaneous access to ddrII memory by nios and vhdl entity

Hi all, I am using Arria II device.Basicly,what i need to do is to transfer large amounts of bulk data,which is stored in DDR2 memory using Ethernet to PC.The problem is that vhdl-based entity is ...
Altera_Forum's avatar
Altera_Forum
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13 years ago

I'm referring to you (as the designer) building mastering logic into your own IP. There is no generic master block out there because it doesn't make sense to have such a thing. If there was a generic master block then you would have to tell it what address you are accessing, provide/accept data from it, and control it..... But if you are going to go through that much trouble then you might as well have the master logic integrated into your own IP otherwise you are building a lot of redundant hardware for nothing.

Study the Avalon-MM spec. Out of all the standard interface specifications out there it's one of the easiest to adhere to, so building a master interface isn't as hard as some seem to believe it to be.