Forum Discussion
Altera_Forum
Honored Contributor
21 years agoHi,
Modelsim 6.0 and beyond is stricter in its interpretation of the VHDL LRM. The stricter interpretation exposes this issue. The quick work around is to replace slv4'(... with slv4(... and slv3'(... with slv3(... in the altera_vhdl_support.vhd file. (i.e. get rid of the ' ) For those that are interested the rule that is causing problems is: "The evaluation of a qualified expression evaluates the operand and checks that its value belongs to the subtype denoted by the type mark." For an array object, "belongs to the subtype" means that the index bounds must match those of the subtype (not just the length of the array). This rule was not enforced in the previous versions of Modelsim. The latest version of SOPC builder (Version 4.2) has dealt with this. Sean