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Altera_Forum
Honored Contributor
Honored ContributorSimple interfacing between Avalon MM Slave and ARM HPS
Hi all, I'm trying to create a simple example of a master-slave communication between the onboard HPS (running Linux) and the FPGA fabric using a Cyclone V. The method I've followed so far is ...
Altera_ForumHonored Contributor
Honored ContributorI really don't get why HW_REGS_BASE (0xfc000000) must be used?!
Can anybody explain this? This is the Base Address of the Coresight System Trace Macrocell or not?! cant we mmap the ALT_LWFPGASLVS_OFST instead?
