Honored Contributor
Honored Contributor<div class='quotetop'>QUOTE (Gaz @ Sep 9 2009, 04:15 PM) <{post_snapback}> (index.php?act=findpost&pid=23796)</div>
--- Quote Start --- The avalon bus cannot be accessed from hardware though it? When i say hardware I mean HDL?[/b] --- Quote End --- I don't see what you mean by this. Of course you can create a "hardware" component that actively accesses slave-components via the Avalon bus (e.g. a DMA controller). <div class='quotetop'>QUOTE (Gaz @ Sep 9 2009, 04:15 PM) <{post_snapback}> (index.php?act=findpost&pid=23796)</div> --- Quote Start --- We need hardware to write to the DACS. I don't think DMA will do the trick because we need to manipulate the data in hardware before writting to the DACS.[/b] --- Quote End --- The Avalon master interface of your component would read the data from memory, your hardware does the "manipulation" and writes it to the DACs. <div class='quotetop'>QUOTE (Gaz @ Sep 9 2009, 04:15 PM) <{post_snapback}> (index.php?act=findpost&pid=23796)</div> --- Quote Start --- Basically, the application transits different wave forms, sort of like a signal generator. The PC will send this data which may be up to 600kb and the hardware will need to output this data at 10Khz.[/b] --- Quote End --- What do you mean by "The PC will send this data" ? I suppose via some standard interface (serial, USB, Ethernet...). So I suppose you need some kind of FIFO or "repetition storage" between the input from the PC interface and the output to the DACs. This can be done as a "hardware" FIFO the NIOS writes to via the Avalon bus (so your component that includes the FIFO and the interface to the DACs will have an Avalon slave interface), or the CPU writes the data into a normal memory and your component will actively read the data from memory (so your component that has the interface to the DACs will have an Avalon master interface to do that, supposedly plus an Avalon slave interface to exchange command and status informations with the NIOS). -Michael
