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Altera_Forum
Honored Contributor
19 years agoSetup an IRQ on a component
Hi ,
I made a "counter" component which I want to interrupt NIOS when reaching 8'h7. I also created a control register in which is bit IRDY (Interrupt Ready) I have 2 questions for my component : 1) How can I setup an IRQ for it ? ( like UART , its IRQ is 5. This info is in "System Contents" tab of "Altera SOPC Builder" ) 2) How can I make NIOS "connect" with my IRDY bit ? Thank you so much , Quan18 Replies
- Altera_Forum
Honored Contributor
Hi,
you have to use the "create new component" tool in SOPC builder: insert your HDL file in the "HDL files"page and then specify your pins function in the "signals" page, nad in your case your interupt pin. Before you had to define your interupt as an output pin of your HDL component. bye - Altera_Forum
Honored Contributor
--- Quote Start --- originally posted by soin@Sep 19 2006, 05:12 PM hi,you have to use the "create new component" tool in sopc builder: insert your hdl file in the "hdl files"page and then specify your pins function in the "signals" page, nad in your case your interupt pin. before you had to define your interupt as an output pin of your hdl component.
bye
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--- Quote End --- Hi Soin, I already added my counter component to SOPC Builder. Here is the wrapper which instantiates the task logic of counter and its interface (defining control , status , ... registers) : module counter_avalon_interface ( clk , // global signal , clk , 1bit , input reset_n , // global signal , reset , 1bit , input chipselect , // avalon_slave 0 , chipselect , 1bit , input address , // avalon_slave_0 , address , 2bit , input write , // avalon_slave_0 , write , 1bit , input writedata , // avalon_slave_0 , writedata , 8bit , input read , // avalon_slave_0 , read , 1bit , input readdata , // avalon_slave_0 , writedata , 8bit , output counter_out, // avalon_slave_0 , writedata , 8bit , export intr // avalon_slave_0 , writedata , 1bit , export ????? ); I also assigned counter_out to LED's but I am not sure of : 1) what pin I should assign intr to make CPU interrupted when it is high. 2) What I should do with my component to make it CPU-interruptable like UART , PIO , .... Have you got ideas about this ? Regards, Quan
- Altera_Forum
Honored Contributor
Hi Soin,
Thank you very much for your tips. I did it!!! I almost forgot irq pin in signal tab of component editor. Thanks, Quan - Altera_Forum
Honored Contributor
Hello ,
I map the signals as following : module counter_avalon_interface ( clk , // global signal , clk , 1bit , input reset_n , // global signal , reset , 1bit , input chipselect , // avalon_slave 0 , chipselect , 1bit , input address , // avalon_slave_0 , address , 2bit , input write , // avalon_slave_0 , write , 1bit , input writedata , // avalon_slave_0 , writedata , 8bit , input read , // avalon_slave_0 , read , 1bit , input readdata , // avalon_slave_0 , writedata , 8bit , output counter_out, // avalon_slave_0 , writedata , 8bit , export intr // avalon_slave_0 , irq , 1bit ); and use this code in NIOS IDE to "process" the interrupt : # include <stdio.h># include <sys/alt_irq.h># include <io.h> # include "counter_routines.h"# include "system.h"# include "altera_avalon_uart_regs.h" void counter_isr( int context ); int main() { int context = 0; printf("Hello from Nios II!\n"); SetInterrupt( COUNTER_0_BASE ); // enable IRDY , my own HAL driver alt_irq_register( COUNTER_0_IRQ , &context , counter_isr ); while( 1 ) { } return 0; } void counter_isr( int context ) { // output 'Y' to UART IOWR_ALTERA_AVALON_UART_TXDATA( UART1_BASE , 'Y' ); } ------- It seemed that CPU wasn't interrupted. Anybody has got this issue before ? Thanks, Quan - Altera_Forum
Honored Contributor
Hi,
are you sure your component generate interupt?is your uart working well?You could try to set a variable, checking it in the main loop, and printf through uart-jtag or uart, using the HAL library instead of writing register... - Altera_Forum
Honored Contributor
--- Quote Start --- originally posted by soin@Sep 20 2006, 02:29 PM hi,are you sure your component generate interupt?is your uart working well?you could try to set a variable, checking it in the main loop, and printf through uart-jtag or uart, using the hal library instead of writing register...
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--- Quote End --- Hi Soin, > are you sure your component generate interupt?# ## Yes , I am. I checked intr pin. It does go high whenever the counter reaches 7. > is your uart working well?You could try to set a variable, checking it in the main loop, and printf through uart-jtag or uart, using the HAL library instead of writing register...# ## Yes , my UART is working well. I tested it in a seperate project by using this function in HAL library : IOWR_ALTERA_AVALON_UART_TXDATA( UART1_BASE , 'Y' ); After testing these stuff , I assign intr pin to irq in component editor , signal tab ; then recompile the System , Quartus project and NIOS IDE program but things are not better. Have I got some steps missed ? Thank you , Quan
- Altera_Forum
Honored Contributor
Hi,
How long does your interupt signal stay high?Nios interupt is level sensitive, so maybe your interupt signal is too short and the processor doesn't detect the interupt.In general your peripheral should assert interupt pin, and it should stay high (or low) as long as the Nios acknoledges the interupt, for example writing a bit in a peripheral's register .It's only an idea... bye - Altera_Forum
Honored Contributor
--- Quote Start --- originally posted by soin@Sep 21 2006, 03:31 PM hi,how long does your interupt signal stay high?nios interupt is level sensitive, so maybe your interupt signal is too short and the processor doesn't detect the interupt.in general your peripheral should assert interupt pin, and it should stay high (or low) as long as the nios acknoledges the interupt, for example writing a bit in a peripheral's register .it's only an idea...
bye
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--- Quote End --- Hi Soin, My interrupt signal stays high in 1 clock. How do I know NIOS acknowledges the interrupt ? Have you got any documents discussing about these (the "lenghth" of interrupt signal and NIOS interrupt acknowledgement) ? Thank you, Quan
- Altera_Forum
Honored Contributor
Hi Soin ,
I did it !!! As you guess , my interrupt signal is too short for NIOS to recognize. I made it long until NIOS receives IRQ and processes ISR in which I de-activate the interrupt signal. Now it really works!!!! Thank you very much, Soin Quan - Altera_Forum
Honored Contributor
Hi quan
Can you send me your source?? Thanks