Setup an IRQ on a component

@Soin

Currently I'm trying to put an interrupt in my custom component. I have one question, in the interrupt signal (in my case its type is 'interrupt sender') properties, which Avalon MM that I suppose to assign? I still confused with the 'associateAddressablePoint' meaning... :( Could you explain it to me?

I've tried to provide an Avalon MM slave consists of a 'write' and a 'writedata' signal. This Avalaon MM slave function is to let the CPU send a command to clear the interrupt bit. Then, I assign my interrupt signal in SOPC to this Avalon MM. However, the result is very strange... my program totally doesn't work, even it has hanged in the beginning.... :(

Help me..please...

I don't really know what this setting is used for, but I always associate the interrupt sender to the MM interface used to clear the IRQ bit too, and never ran into any problem.

Your problem has probably another explanation. You could use SignalTap to check the status of you IRQ, see if it raised and check that it is properly cleared by the interrupt handler.

Hi everyone. I am also designing an counter with interrupt. This is my code:

//Write 1 to address 0 to start counter
//Write 2 to address 0 to stop counter
//Write 0 to address 0 to reset counter
//Read address 1 to get count value
module counter (clk, reset, address, chipselect, read, readdata, write, writedata,irq);
input clk, reset, chipselect, read, write;
input  address;
input  writedata;
output  readdata;
output irq;
reg  readdata;
reg  count;
reg  control;
reg irq;
//wire done;
always @ (posedge clk)
begin
if (control==2'b01) count <= count + 1;
else if (control==2'b00) count <= 0;
else count <= count;
end
//assign irq=(count==32'd10)?1:0;
always @ (posedge clk)
begin
if (count>=32'd1000000000) irq<=1;
else irq<=0;
end
always @ (posedge clk)
begin
if (chipselect && write && (address==0)) control <= writedata;
else if (chipselect && read && (address==1)) readdata <= count;
else if (!chipselect) readdata <= 32'hZ;
end
endmodule

And this code functions perfectly as wanted. But when want to add custom hardware in SOPC having trouble to select the interface and signal type. It shows an error Associated Addresablepoint out of range. :cry:

Is it correct how i design the counter with interrupt? and how to add to SOPC builder? Any suggestions please.

Thank you.

Hi Moganesh,

As Daixiwen said, to establish the interrupt in your component, besides providing interrupt signal, you also have to provide a register to store the IRQ state. Then in the interrupt signal properties, just associate the avalon MM to this register.

I'm sorry I couldn't send the component file to you, because currently I can't access my workstation.

Good luck

Hi fightingdreamer,

I did what you told like creating a register to store the interrupt and associated avalon mm slave to the register but still having the problem

Here is the C-code:

//Write 1 to address 0 to start counter
//Write 2 to address 0 to stop counter
//Write 0 to address 0 to reset counter
//Read address 1 to get count value
module counter (
//Avalon MM
clk, reset, address, chipselect, read, readdata, write, writedata,
//Interrupt_handler
irq,readdata_irq,writedata_irq,write_irq);
input clk, reset, chipselect, read, write ;
input write_irq ;
input  address;
input  writedata;
output  readdata;
output irq;
input writedata_irq;
output  readdata_irq;
reg  readdata;
reg  count;
reg  control;
reg readdata_irq;
reg irq;
//wire irq;
always @ (posedge clk)
begin
if (control==2'b01) count <= count + 1;
else if (control==2'b00) count <= 0;
else count <= count;
end
//assign irq=(count==32'd1000000000)?1:0;
always @ (posedge clk)
begin
if (count>=32'd1000000000) irq<=1;
else irq<=0;
end
always @( posedge clk)
begin
if (irq) begin readdata_irq<=1; end
else if (write_irq && writedata_irq) begin readdata_irq<=0; end
else readdata_irq<=0;
end
    
always @ (posedge clk)
begin
if (chipselect && write && (address==0)) control <= writedata;
else if (chipselect && read && (address==1)) readdata <= count;
else if (!chipselect) readdata <= 32'hZ;
end
endmodule

I still having problem with the error showing Associated Addresablepoint out of range.

Hi,

Actually just now i did not set the associated addressable interface parameter of the interrupt sender. That is what causing the errors. But I still having warning as follows:

Warning: counter_0.irq: Interface has no signals
Warning: counter_0.irq: Master has no read or write interface
Warning: counter_0.interrupt_handler: readdata width must be in {8, 16, 32, 64, 128, 256, 512, 1024} for dynamic addressing
Warning: counter_0.interrupt_handler: writedata width must be in {8, 16, 32, 64, 128, 256, 512, 1024} for dynamic addressing

Is the warning have to be considered or can be ignored?

Those warnings are rather strange. The first seems to say you didn't declare any signal in the irq interfare. Don't you have at least an irq signal? The second one seems to indicate that your irq interface is an Avalon master rather than an interrupt sender.

For the two others, your data bus should really be with a size that is a multiple of 8, even if you read/write only one bit.

Your data bus really needs to be 32bits for accesses from a NiosII cpu.

Otherwsie a 'bus width adapter' will be added to convert the 23bit master cycle from the Nios into multiple slave cycles (with the appropriate byte enables for writes).