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Altera_Forum
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9 years ago

set_output_delay explained for dummies

Hello. I have tried to wrap my brain around the documentation describing "set_output_delay", but I just don't seem to get it. My brain thinks like this: "Relative to the rising-edge of my ou...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Yes, I'm just saying it's unlikely you'll make timing. The delay chains only make it longer. They can't make the delay negative. You can shift your launch clock back with a PLL and use multicycles to say the data is launched before 0ns, but I don't think that really makes sense.