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Altera_Forum
Honored Contributor
12 years agoSerial communication and interval timer integration problems
I'm required to build a Nios based fpga firmware for a specific system, which includes UART RS-232 communication. The communication itself based on packets of 20 bytes, with time outs between bytes r...
Altera_Forum
Honored Contributor
12 years agoThanks for the answer. I'm new to this ans studying by myself.
I'm not using sys_clk_timer nor timerstamp_timer. Is it necessary to create them in QSYS and define in Nios IDE? In examples I've noticed that usually interrupt handling functions defined as static and some variables defined as volatile. When do I have to use this definitions? I'm also using timers for a fan control: PWM and tachometer. Timer for a PWM is very dynamic, but still it works without any problems.