Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
20 years ago

Selective Cache Enable/Disable support

Hi, Does NIOSII processor support selective caching of the entire system-address space. For example in system address space we have the SDRAM, and all other addressable-peripherals. Whenever ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
20 years ago

The CPU let's the software decide on each access to memory whether it wants to bypass the D-cache or not.

The software can either use the ldio/stio family of instructions to bypass the D-cache or can just set bit 31 of the address to 1.

There are HAL macros to hide this from most users. I don't know what Linux provides.