SDRAM vs. DDRAM Performance

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originally posted by svhb@Sep 18 2006, 03:17 PM

some info can be found in followong graph : testresults (http://users.pandora.be/svhb/test%20results%20jpeg%20algorithm.pdf)

some explanations about the graph :

cpu 85 pm ddr mtxa130 dm ddr mtxa130 means :

cpu 85 : cpu speed 85mc,

pm ddr mtx 130 = program memory ddr microtronix core 130mc

dm ddr mtxa130 = data memory (stack, ...) ddr microtronix core 130mc

all cpus on 52mc are niosii in a cyclone device

all others are niosii in cycloneii

the cpu is generated as standard (s-version), with smalles possible instruction cache, no data cache (we want to test memory access here!).

the algorithme is a jpeg encoder, the different steps in the encoding are measured also. no hardware optimisations!

synchronuous sram seems to be best, but more expensive.

hope this helps.

stefaan

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@Stefaan

What DDR-Interface was that? 16bit? What SDR-Interface? Also 16bit or 32bit?

Can you tell me more details about the hardware?

Thanx

Marco