Forum Discussion
Altera_Forum
Honored Contributor
19 years agoSDRAM vs. DDRAM Performance
Hi @all, for a redesign i have to check which performance is better: A 32bit SDRAM with the SOPC-Builder SDRAM Controller (Latency Aware SDRAM Controller Version 6.01) or a 16bit DDRAM w...
Altera_Forum
Honored Contributor
19 years agoSome info can be found in followong graph : testresults (http://users.pandora.be/svhb/test%20results%20jpeg%20algorithm.pdf)
Some explanations about the graph : CPU 85 PM DDR MTXA130 DM DDR MTXA130 means : CPU 85 : cpu speed 85Mc, PM DDR MTX 130 = program memory DDR Microtronix core 130Mc DM DDR MTXA130 = data memory (stack, ...) DDR Microtronix core 130Mc All CPUs on 52Mc are NIOSII in a cyclone device All others are NIOSII in CycloneII The CPU is generated as standard (s-version), with smalles possible instruction cache, no data cache (we want to test memory access here!). The algorithme is a JPEG encoder, the different steps in the encoding are measured also. No Hardware optimisations! Synchronuous SRAM seems to be best, but more expensive. Hope this helps. Stefaan