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Altera_Forum
Honored Contributor
Honored ContributorSDRAM Interface to SO-DIMM?
I'm planning a NiosII design and we need a pile of RAM but don't need the high bandwidth of SRAM. It's hard to find SDRAM chips in stock, given their commodity nature, and so I was looki...
Altera_ForumHonored Contributor
Honored ContributorFrom one of the engineers:
We completely support SO-DIMM's, but do not at all support I2C -- our SDRAM controller only does static SO-DIMM configurations (set up in the wizard, pre-quartus compile). This should be reasonably well described in the SOPCBuilder SDR-SDRAM documentation. I'm guessing that the user wants to have their system dynamically self-configure SDRAM at power-up, via I2C, to be able to talk to whatever (potentially new) SO-DIMM it happens to find. I believe that (aside from the fact that the controller can't do it) putting in a different SO-DIMM might change the address space requirements of the system, which the CPU and other system components can't deal with anyway. Since a rebuild would be required to change memory size/capacity anyway, you can reconfig your controller to match the new SO-DIMM at the same time. If this doesn't help, please reply. Heck, reply if it does help!
