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Altera_Forum
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21 years ago

SDRAM for program code

HI (again) I’m bulding a multiprocessor system with 2 cpu’s, using 2x Jtag Uart, SDRAM for program memory and 2x onchip memory blocks for rwdata and a dualport memory for communication between...
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Altera_Forum
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21 years ago

That's correct. On your board you need a 3.5 ns delay (phase shift of -3.5ns). This compensates for the board delays in the clock networks.