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Altera_Forum
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21 years ago

SDRAM for program code

HI (again) I’m bulding a multiprocessor system with 2 cpu’s, using 2x Jtag Uart, SDRAM for program memory and 2x onchip memory blocks for rwdata and a dualport memory for communication between...
Altera_Forum's avatar
Altera_Forum
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21 years ago

Hi

By editing the Standrad sytem example that was included in the NiosII kit I got it working.

I guess I needed the PLL that ensures timing adjustments for the SDRAM device.

Stian