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Altera_Forum
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21 years ago

SDRAM for program code

HI (again) I’m bulding a multiprocessor system with 2 cpu’s, using 2x Jtag Uart, SDRAM for program memory and 2x onchip memory blocks for rwdata and a dualport memory for communication between...
Altera_Forum's avatar
Altera_Forum
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21 years ago

In my Opinion your CPU-addresses (reset and exception) have to point to some kind of memory. If you want to execute code from your sdram, maybe the exception addresses should point to that device?!

I'm using the cyclone developement board and the documentiation for that device points that code-execution is started from the given exception-address...

May be, you should also take a look at "NIOS II Software Developer's Handbook" section 4-30 Memory Usage for that topic...