SDRam Controller is there a better one ?

just to understand you right ...

if i tune all other masters to the speed of the sdram then there will be no performance loss. yes but that would lead to a big problem as currently 64MHz is the max quartus will fit. an ep2c50 will need 2-3 hours on a 3.8GHz P4 to fit without timing warnings.

i had tried to setup a project with different clocks by just enabling the pll inside sopc to create 2 clocks and assigned them.

nios, sdram jtag and epc at the fast one, all other at the slow one.

did not succeded as nios still was unable to run properly even the flash prommer did not read out the correct sysid .. no matter if i connected sysid to the nios or the slow clock.

i never had a nios running with different clock domains ... but no more actions on that currently