SDRAM clock?

As far as i understand the avalon switch fabric this should not be the user's problem but in fact it is handled by the clock domain crossing section of the avalon switch fabric.

You can run nios cpu at a different clock speed than all the other sopc modules.

place a fast clock wherever you need fast clock and a slow clock at sopc modules like uart that do not need to run at the fast clock.

you can place some pll's that produce different clocks and connect the sopc modules as you like.

we (the user) do not have to worry about clock domain crossing as this is handle by quartus.

but .. i have to report that a simple nios_cpu + sdram @ fastclock and even a sysid @ slowclock with one sopc_pll delivering both clocks didn't work here and nioscpu was not able to read the sysid. But no time yet to do more investigation about that.

Regards.

Michael Schmitt