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Altera_Forum's avatar
Altera_Forum
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20 years ago

SDRAM access speed?

Using Nios II & SOPC builder, I'm trying to design an DMA to SDRAM interface that will transfer data from an on chip ram to SDRAM using DMA. I used ModelSim to test my interface and found t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
20 years ago

Are you using the PLL output directly to the SDRAM clock? I think you must screw it by a few degrees relative to your NIOS clock. From what I can remember some of the example designs demonstrates this.

VictorS