SDRAM access speed?

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originally posted by quin_crc@Dec 15 2005, 12:28 PM

using nios ii & sopc builder, i'm trying to design an dma to sdram interface that will transfer data from an on chip ram to sdram using dma.

i used modelsim to test my interface and found that i can have an sdram access speed of ~40mb/s. have anyone been able to go at a higher access speed than that?

i have done many things to make the speed faster and allow larger transfer of data trunk. i set the sdram controller clock and sdram pll to 75 mhz (tried 80 but failed). my dma controller and on chip ram clock is set at 100 mhz. the arbitration# between dma and sdram is set at 64.

also, my on-chip ram size is set to 16kb and dma's length is 16.

does anyone have any other suggestion that will allow me to speed up the sdram access speed? http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/unsure.gif

thanks a ton for your reply...

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Sorry about unable to answer your question. But want ask you how did you get on-chip RAM address mapped onto avalon bus. I am proposing to transfer more than 10K memory contents to SDRAM by DMA. Thanks a lot, and sorry for bothering.