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Altera_Forum
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15 years ago

Sdram access in HDL and Nios II

Hi I'm fairly new to FPGA programming. I would like to use the onboard sdram memory of my DE2-70 board to pass data between c++ software, running on a Nios II cpu and a verilog component. W...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

You need to add an Avalon MM master interface to your custom component.