Altera_Forum
Honored Contributor
20 years agosampling technique
hi there....i'm a user of nios I , currently my project using this nios requires to obtain data (sample data) every 50 micro seconds. How do i do this ? any idea?
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--- Quote Start --- Hi henk , i tried to do in SW but now i discovered the duty cycles for the interrupt is far more that what is expected... can you please guide me in implementing in the hardware ?[/b] --- Quote End --- Hi Wayne, hmm, solving this really depends on all your requirements, what you want to achive. I assumed you want to store digital data directly available on input ports of the device (ADC?), it could also be that you use the PWM to find the digital equivalent of the analog value or the data is already digital..... Then there is the question where do you store the data? Assuming you have N bits digital data and you want to store that with a programmable time distance then it is just a counter and a pulse which could for instance trigger a state machine to store data in memory or maybe the pulse itself is enough to store the data (write pulse on an internal memory). Actually this is just digital design. I assume you are familiar with that, if not then there are many books about VHDL and Verilog and there is the Altera documentation to guide you through that process. For me that goes beyond the scope of this forum, then I would be doing your design work. Regards,