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Altera_Forum
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12 years ago

Running Quartus 13.0sp1 Triple Speed Ethernet IP on uClinux

Hi, I have had no luck getting the Ethernet connection working and am hoping someone could provide some guidance. I have a Cyclone V GX development board running uClinux but I would like to enh...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Hi,

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Please excuse my lack of experience using scatter gather DMA, but is there a way to test the SGDMA? I did the scope analyze on the GMII interface and the enet_gtx_clk is running 125MHz but the transmit control signal remains low. In QSYS, the SGDMA transmit interface I have

CSR -> CPU.data_master

descriptor_read and descriptor_write -> Onchip Dscriptor_memory.s1

m_read -> DDR3.avi

out -> tse_mac.transmit

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Please observe the signals around csr, descripter_read and m_read by your SignalTapII. At first, your CPU instructs the start of DMA by using the csr bus, after that the SGDMA read a descriptor and get the command which instructs the transfer region.

And please not that the SGDMA is using 'physical addresses' not virtual addresses. So you must make the contents of descriptors by physical ones.

Kazu