Honored Contributor
Honored Contributorin my custom board,fpga works well when i download *.pof by as mode or *.sof by jtag mode, but i get the error information as following when i "run as hardware" in niosii ide.
using cable "byteblasterii [lpt1]", device 1, instance 0x00
processor is already paused
reading system id at address 0x02000908: verified
downloading 01000020 ( 0%)
downloading 01010000 (98%)assertion "m_state == state_debug" failed: file "nios2
debug.cpp", line 1695
signal 6
any one give me some advices? thanks in advance
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--- Quote End --- I can't say that I have seen that one! The messages suggest that you can successfully download .sof and then get control of Nios via its debug core to read sysid -- in fact this means that quite a bit of logic is functioning correctly to get to that point. The fact that this occurs during download leads me to suggest that, perhaps, something bad is happening during memory access (write/readback) as your program is downloaded. Is there any way you can independently verify that the RAM you're targetting is behaving correctly? An example: Try a system with on-chip ram (assuming that the above isn't from on-chip ram) and do some basic debugging of all memories in the system to verify their operation. If this doesn't help it might be time to contact Altera support.
