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Altera_Forum
Honored Contributor
21 years agoreset & configuration revisited
I have some custom boards (cyclone, NiosIIe 33Mhz) that exhibits strange behavior on reset (either full POR OR soft reset (DEV_CLRn)). The behavior is that the Nios sometimes executes the code at the...
Altera_Forum
Honored Contributor
21 years agoYou might be able to eliminate xtalk from Flash_CS to RESET line by setting slew rate control on Flash_CS pin in Quartus and / or setting the Flash_CS output pin to have a lower max current drive capability in Quartus (both are options in the Assignment Editor, reached from the Assignments -> Pins menu option). This will only work for you if you can aford the extra setup time requirement this adds to your flash access cycle. If on the Avalon bus you've set a 1 clk setup state on transaction, you should be fine...