Reduce Interrupt latency?

There are many techniques to improve your interrupt response time. Add your own custom instruction to save/restore registers is one possibility but there may be other approaches that are easier.

If you have any spare on-chip memories, you can add a tightly-coupled instruction memory and tightly-coupled data memory. The Altera HAL supports a separate exception stack that you can place in the tightly-coupled data memory. Also, you can arrange to have the Altera HAL exception handler and your ISR linked to run in the tightly-coupled instruction memory. This way when an interrupt occurs, there are no cache misses in the exception handler code or for the data accesses it makes to save/restore registers.

I believe documentation for this approach is available and there are software and hardware examples.