Honored ContributorHello,
I'm trying to read address 0x0400000 (start address of avalon interface 32bits read) and the NIOS just stopped working, I can't read the entire memory block (0x0400000 - 0x040ffff or so) but i can read from other memory blocks, I wonder if anyone encountered this problem ?
Honored ContributorWhat device is connected to that address range?
Probably the device is keeping the waitrequest line asserted and stalls the cpu.Honored Contributorfor unknown reason (a friend told me to try this) I needed to set the MSB to 1 so .. 0x0400000 is actually 0x8400000 .... solved !
Honored Contributorwait a minute... setting the MSb to 1 makes you bypass the cache on Nios2, not doing magic on the handshakes. Are you sure the problem is solved?
Honored ContributorHonored ContributorSorry, I made a mistake. I counted 8 digits instead of 7 so I thought you were bypassing cache. My observation was wrong.
Really, I do not know what you are doing. I just wanted to make you think carefully about the "solution" you found. I mean that, if I were you, I would double check if I made some other small changes to the project in the meanwhile. Just to avoid facing again this problem without having fully understood it the first time. I don't pretend to teach anything to anyone, neither to oblige someone to do something. Mine is just an advice from a guy that faces his own bugs everyday... some of them introduced by unlucky patches introduced to solve others!Honored ContributorSorry, it is 8 digits, I still don't know what is bypass the cache you mentioned, i'll be more then happy to learn :) ....
Honored ContributorBypassing the cache would probably prevent the CPU from reading a full cache line using pipelining or burst, so it does make a difference on how the component is accessed. What do you have at this address?
Honored Contributor10x for all the answers ...
I have registers ... we are two students, one from SW and the other from HW, so I write the code for my friends firmware ... we use tjose addresses to turn on/off devices (lamp, motor, etc ...) but if I don't write 1 to the MSB the NIOS just stopping ... :( I just know it solved my problem since a friend encountered this problem last year ...Honored ContributorYou will need to disable the data cache in order to access the hardware registers (and get sensible actions from the hardware).
The nios cpu itself shouldn't stop if it performs a cache line read/write, but your hardware device might be buggy (and fail to terminate the back to back cycles) and/or contain a register that just does a reset!Honored Contributoror the fact that the CPU wants to write a full cache line could make it write at an address you didn't anticipate.
Use the IORD/IOWR macros to access hardware instead of pointers, it will guarantee a cache bypass.
