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Altera_Forum
Honored Contributor
Honored Contributorread and write timings on avalon interface
Hello! I'm having some issues with the timings of read and write operations to my custom peripherals. I am using a Nios 2 processor a PIO peripheral for testing and my custom peripheral....
Altera_ForumHonored Contributor
Honored ContributorI guess that the 14 clock cycles are due to the clock domain crossing logic between the CPU and the peripheral. But still, 14 seems a lot!
