Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

read and write timings on avalon interface

Hello! I'm having some issues with the timings of read and write operations to my custom peripherals. I am using a Nios 2 processor a PIO peripheral for testing and my custom peripheral....
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

I guess that the 14 clock cycles are due to the clock domain crossing logic between the CPU and the peripheral. But still, 14 seems a lot!