Forum Discussion

Megavolt91's avatar
Megavolt91
Icon for New Contributor rankNew Contributor
1 year ago
Solved

Problem writing the NIOS II program to the EPCS controller.

I have a problem writing the NIOS II configuration and program to the EPCS controller. I've read the entire Internet on this topic and 70 posts on this forum. I've tried everything that's written he...
Embedded Applications Layer
Nios Architecture
  • BoonBengT_Altera's avatar
    BoonBengT_Altera
    1 year ago

    Hi @Megavolt91,


    Thank you for posting in Intel community forum, hope all is well and apologies for the delayed in response.

    Thanks for the details explanation, appreciate the effort on explaining the situation, it definitely helps us to understand the situation and others too.


    Just to clarify, you are able to program to Nios II configuration to EPCS controller now and Nios II is also starting up. However there is confusion in the addresses?


    Note: Nios II has been deprecated and no longer supported, hence perhaps it is advised to moved to Nios V, however we would try our best to clarify on your situation.


    Best Wishes

    BB


Megavolt91's avatar
Megavolt91
Icon for New Contributor rankNew Contributor
1 year ago

So, I learned how to write to flash firmware. These firmwares do not want to be read by bootloader. I see several versions of ready-made bootloaders in the \components\altera_nios2 folder. I figured out that my bootloader is taken from this file boot_loader_epcs_sii_siii_ciii.srec. I noticed that these files do not directly mention Cyсlone 4. Probably, this does not mean anything, but this does not work - the bootloader does not want to load the code. What to do - the debugger here is either crooked, or I do not know how to prepare it. I did not find a disassembler. In the end, I began to write something of my own.

I took it as a basis, learned how to output dumps. As a result, based on the source code, I wrote a firmware analyzer in EPCS. This is what I see:

FirmWare Begin At: 23c9d
Record N: 0 At EPCS Address: 23ca5 Length: 139c8 Will be copied to adress: 0
Record N: 1 At EPCS Address: 37675 Length: 1400 Will be copied to adress: 14dc8
Copy Succses. Reset Address: 1b8
Last Address: 38a79
Copy Records: 2

The code correctly calculates the FirmWare start in EPCS. There are two records programmed into EPCS. One with the length 0x139c8 will be programmed into SDRAM at address 0, the second with the length 0x1400 will be programmed into SDRAM at address 0x14dc8. According to the linker's MAP file, the reset address is defined correctly. I didn't understand why the second record is copied starting from address 0x139c8 + 0x1400.