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ZhiqiangLiang's avatar
ZhiqiangLiang
Icon for Occasional Contributor rankOccasional Contributor
6 months ago

NIOS connected to IRQ from FPGA but not PIO

Hi, I firstly created a new IP, and I add the interrupt sender FPGA_INTS. please see my picture below. I then connect the FPGA_INTS to irq of NIOS. Please see my picture below. The generated syste...
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ZhiqiangLiang's avatar
ZhiqiangLiang
Icon for Occasional Contributor rankOccasional Contributor
6 months ago

@StefanG_Altera

Thank you!

I have already done the OR-combine in RTL code of my IP, and output only 1 wire interrupt from my IP.

Currently, the problem is, the generate ID is still -1. please see the following picture.

If I manually change IRQ to 4 and ID to 0, the C code could successfully enter the ISR in my c code.

The weird thing is that I have to manually change the number after I click "generate BSP".

  • StefanG_Altera's avatar
    StefanG_Altera
    Icon for Occasional Contributor rankOccasional Contributor
    6 months ago

    Hi,

    I am not sure why the BSP builder is not generating the right macro header values (system.h) for your custom component.

    Please try to use my component example as it worked on, my side. You may e.g. have some IRQ port interface settings not set right in your _hw.tcl file. Note: I used Quartus 22.1-std.