Question about a simple combinationnal custom instruction

I've seen problems where adding and removing custom instructions causes them to get added multiple times (with an increasing numeric suffix each time).

The only way I could remove them was by hand editing the sopc file!

It seems you're right. I started again from scratch and it worked fine.

By the way, is there a way to edit a custom instruction ? (For a custom logic block, i can edit the component listed in the component library but for an instruction, i didn't find the way to do it).

I asked our Altera rep the same question ...

Q1: Reply: You may edit this component with the method below:

[1] click File -> New Component in SOPC Builder tool

[2] click File -> Open in Component Editor

[3] select the tcl script file of the component

Thanks a lot for that quick answer.

Have a nice day

The combinational block is now fully functional. Now I'm trying to build a multicycle custom instruction which performs filtering in 4 clock cycles. The waveform of my component is available in the attached files.

I have also attached the configuration of the interface in component editor; I specified the number of clock cycles required.

Here is my problem : when I go to the software part and I try my filter with that code :

# include <system.h>

# include <unistd.h>

int main()

{

int i;

int res=20;

//int j;

int tab[25]={256,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};

for(i=0;i<25;i++)

{

res=ALT_CI_MY_FIR_CI_INST(tab[i]);

printf("Iteration %d ; mem = %d \n",i,res);

}

return 0;

}

I get the following results :

Iteration 0 ; mem = 0

Iteration 1 ; mem = -14

Iteration 2 ; mem = 10

Iteration 3 ; mem = 12

Iteration 4 ; mem = 16

Iteration 5 ; mem = 21

Iteration 6 ; mem = 25

Iteration 7 ; mem = 29

Iteration 8 ; mem = 32

Iteration 9 ; mem = 32

Iteration 10 ; mem = 32

Iteration 11 ; mem = 29

Iteration 12 ; mem = 25

Iteration 13 ; mem = 21

Iteration 14 ; mem = 16

Iteration 15 ; mem = 12

Iteration 16 ; mem = 10

Iteration 17 ; mem = -14

Iteration 18 ; mem = 0

Iteration 19 ; mem = 0

Iteration 20 ; mem = 0

Iteration 21 ; mem = 0

Iteration 22 ; mem = 0

Iteration 23 ; mem = 0

Iteration 24 ; mem = 0

These results are correct but there is a lag of one sample. Where could be the problem ?

I tried to set the "Clock Cycles" in component editor to 5. Then i got my first result at the right time but then the next samples were "merged".

Then I tried to rebuild my design using falling edge instead of rising edge and now it works fine.

Thanks to everyone!