Forum Discussion
Altera_Forum
Honored Contributor
21 years agothe adress lines are connected as follows
CPU A[9..2] to 8-BIT SLAVE A[7..0] BASE 0x903000 correct behavior should be (is with Quartus 4.1 Nios 1.0) : function systemadd(CPU) add at slave IORD(BASE,0x00) 0x????00 0x00 IORD(BASE,0x01) 0x????04 0x01 IORD(BASE,0x02) 0x????08 0x02 IORD(BASE,0x03) 0x????0C 0x03 .. IORD(BASE,0x10) 0x????40 0x10 wrong behavior is (measured): function ldwio r2,0(r2) systemadd(CPU) add at slave IORD(BASE,0x00) r2=0x903000 0x????00 0x00 IORD(BASE,0x01) r2=0x903004 0x????01 0x00 IORD(BASE,0x02) r2=0x903008 0x????02 0x00 IORD(BASE,0x03) r2=0x90300C 0x????03 0x00 IORD(BASE,0x04) r2=0x903010 0x????04 0x01 (by debugging assembly code, i can see that r2 has the correct value before ldwio)