QUARTUS 4.2 NIOS 1.1 UPDATE PROBLEM

This was an issue with the SOPC Builder that came with Quartus II version 4.1 The desciption that you were sent only applies if a user connected the extra address bit to the peripheral. When you upgrade to Quartus II version 4.2 that address bit is no longer present so you have two options. 1) The fix that was outlined in your correspondence from Altera, or 2) regenerate, connect the address bits correctly, and align your address space to the peripheral correctly in software(so I recommend you do the first one).

Also as MiR stated, to talk to your peripheral you have to be word aligned, even though you are talking to an 8 bit peripheral, the data on the Nios II side is 32 bit. An example of this is if you have an 8-bit peripheral, and you talk to external native registers called "A", "B", and "C" with the base address of the peripheral specified at "base". Then you access the peripheral reading and writing at the following addresses:

A <---> base

B <---> base + 4 (next word)

C <---> base + 8 (next word)

So you may have run into either issue. If it looks like the address bits are properly aligned then the answer that you were sent from Altera was a different issue.

I recommend looking at the link that MiR provided since there is a lot of discussion in their about this.

Let us know if you are still running into problems.