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Altera_Forum
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11 years ago

Qsys MM modules used a standalone IP cores?

Hello, Is it possible to use a Qsys module (such as the UART MM component) as a standalone core for a VHDL design? I have a VHDL designa and I"m looking for a basic UART at the moment and in ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Ok. So I could write an HDL module to connect to the address, data etc and control the MM UART even though I'm not using nios ii? If I did this, do I just use the API/register information to set bits ect just like I would if I was using C on a nios ii?